From 92032b446c4f7d8b45e7263269cc2f28ef2d1821 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Fri, 10 Feb 2023 10:07:50 +0100 Subject: [PATCH] cpu/NaxRiscv fix with_fpu typo --- litex/soc/cores/cpu/naxriscv/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/cores/cpu/naxriscv/core.py b/litex/soc/cores/cpu/naxriscv/core.py index 1ddaffe4f..1ce426ca9 100755 --- a/litex/soc/cores/cpu/naxriscv/core.py +++ b/litex/soc/cores/cpu/naxriscv/core.py @@ -259,7 +259,7 @@ class NaxRiscv(CPU): for file in NaxRiscv.scala_paths: gen_args.append(f"--scala-file={file}") if(NaxRiscv.with_fpu): - gen_args.append(f"--scala-args='rvf=true,rvd=true") + gen_args.append(f"--scala-args=rvf=true,rvd=true") cmd = f"""cd {ndir} && sbt "runMain naxriscv.platform.LitexGen {" ".join(gen_args)}\"""" print("NaxRiscv generation command :")