From 927fd675bc2a91d2aa04f2c601ff1380caa3467b Mon Sep 17 00:00:00 2001 From: Gabriel Somlo Date: Sun, 31 Jan 2021 09:06:52 -0500 Subject: [PATCH] sdclk: additional halving to prevent clock going "too fast" When the system/bus clock frequency is an exact power-of-2 multiple of the desired sdcard frequency, we can drive the latter at the "maximum" speed via the "perfect" divider. That sometimes turns out too fast, so in order to be conservative, we double the divider, thus halving the resulting sdclock. --- litex/soc/software/liblitesdcard/sdcard.c | 1 + 1 file changed, 1 insertion(+) diff --git a/litex/soc/software/liblitesdcard/sdcard.c b/litex/soc/software/liblitesdcard/sdcard.c index 8140fb912..1cb74b4a4 100644 --- a/litex/soc/software/liblitesdcard/sdcard.c +++ b/litex/soc/software/liblitesdcard/sdcard.c @@ -106,6 +106,7 @@ void sdcard_set_clk_freq(uint32_t clk_freq, int show) { uint32_t divider; divider = clk_freq ? CONFIG_CLOCK_FREQUENCY/clk_freq : 256; divider = pow2_round_up(divider); + divider <<= 1; /* NOTE: workaround for occasional sdcardboot failure */ divider = min(max(divider, 2), 256); #ifdef SDCARD_DEBUG show = 1;