From 935f3a533753236430a99eb6c9edac62356acd4b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 4 Mar 2019 09:40:14 +0100 Subject: [PATCH] boards/ulx3s: add device selection parameter ULX3S can be populated with LFE5U-45F (default) or LFE5U-85F --- litex/boards/platforms/ulx3s.py | 4 ++-- litex/boards/targets/ulx3s.py | 8 +++++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/litex/boards/platforms/ulx3s.py b/litex/boards/platforms/ulx3s.py index c1815848b..b10ab673d 100644 --- a/litex/boards/platforms/ulx3s.py +++ b/litex/boards/platforms/ulx3s.py @@ -69,5 +69,5 @@ class Platform(LatticePlatform): default_clk_name = "clk100" default_clk_period = 10 - def __init__(self, **kwargs): - LatticePlatform.__init__(self, "LFE5U-45F-6BG381C", _io, **kwargs) + def __init__(self, device="LFE5U-45F", **kwargs): + LatticePlatform.__init__(self, device + "-6BG381C", _io, **kwargs) diff --git a/litex/boards/targets/ulx3s.py b/litex/boards/targets/ulx3s.py index 28da467fb..ed7e7350c 100755 --- a/litex/boards/targets/ulx3s.py +++ b/litex/boards/targets/ulx3s.py @@ -46,8 +46,7 @@ class _CRG(Module): # BaseSoC ------------------------------------------------------------------------------------------ class BaseSoC(SoCSDRAM): - def __init__(self, toolchain="diamond", **kwargs): - platform = ulx3s.Platform(toolchain=toolchain) + def __init__(self, platform, **kwargs): sys_clk_freq = int(50e6) SoCSDRAM.__init__(self, platform, clk_freq=sys_clk_freq, integrated_rom_size=0x8000, @@ -68,11 +67,14 @@ def main(): parser = argparse.ArgumentParser(description="LiteX SoC on ULX3S") parser.add_argument("--gateware-toolchain", dest="toolchain", default="diamond", help='gateware toolchain to use, diamond (default) or trellis') + parser.add_argument("--device", dest="device", default="LFE5U-45F", + help='FPGA device, ULX3S can be populated with LFE5U-45F (default) or LFE5U-85F') builder_args(parser) soc_sdram_args(parser) args = parser.parse_args() - soc = BaseSoC(toolchain=args.toolchain, **soc_sdram_argdict(args)) + platform = ulx3s.Platform(device=args.device, toolchain=args.toolchain) + soc = BaseSoC(platform, **soc_sdram_argdict(args)) builder = Builder(soc, **builder_argdict(args)) builder.build()