From 94e239ff13325a332dd5a3932ff08bc0426b5d44 Mon Sep 17 00:00:00 2001
From: Arnaud Durand <arnaud.durand@unifr.ch>
Date: Thu, 19 Dec 2019 09:03:12 +0100
Subject: [PATCH] Add integer attributes

---
 litex/gen/fhdl/verilog.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/litex/gen/fhdl/verilog.py b/litex/gen/fhdl/verilog.py
index 0e34af26f..e1bd8da4e 100644
--- a/litex/gen/fhdl/verilog.py
+++ b/litex/gen/fhdl/verilog.py
@@ -210,7 +210,8 @@ def _printattr(attr, attr_translate):
         if not firsta:
             r += ", "
         firsta = False
-        r += attr_name + " = \"" + attr_value + "\""
+        const_expr = "\"" + attr_value + "\"" if not isinstance(attr_value, int) else str(attr_value)
+        r += attr_name + " = " + const_expr
     if r:
         r = "(* " + r + " *)"
     return r