From 957c16264aa02685cc9b53c72b259ebfd98b9e67 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 4 Feb 2015 19:57:20 +0100 Subject: [PATCH] reorganize core files --- liteeth/__init__.py | 12 ------------ liteeth/core/__init__.py | 12 ++++++++++++ liteeth/{arp/__init__.py => core/arp.py} | 0 liteeth/{ip/__init__.py => core/ip.py} | 0 liteeth/{udp/__init__.py => core/udp.py} | 0 liteeth/frontend/__init__.py | 0 .../{etherbone/__init__.py => frontend/etherbone.py} | 0 liteeth/test/arp_tb.py | 4 ++-- liteeth/test/ip_tb.py | 4 ++-- 9 files changed, 16 insertions(+), 16 deletions(-) create mode 100644 liteeth/core/__init__.py rename liteeth/{arp/__init__.py => core/arp.py} (100%) rename liteeth/{ip/__init__.py => core/ip.py} (100%) rename liteeth/{udp/__init__.py => core/udp.py} (100%) create mode 100644 liteeth/frontend/__init__.py rename liteeth/{etherbone/__init__.py => frontend/etherbone.py} (100%) diff --git a/liteeth/__init__.py b/liteeth/__init__.py index 3a2180598..e69de29bb 100644 --- a/liteeth/__init__.py +++ b/liteeth/__init__.py @@ -1,12 +0,0 @@ -from liteeth.common import * -from liteeth.mac import LiteEthMAC -from liteeth.arp import LiteEthARP -from liteeth.ip import LiteEthIP - -class LiteEthIPStack(Module, AutoCSR): - def __init__(self, phy, mac_address, ip_address): - self.phy = phy - self.submodules.mac = mac = LiteEthMAC(phy, 8, interface="crossbar", with_hw_preamble_crc=True) - self.submodules.arp = arp = LiteEthARP(mac, mac_address, ip_address) - self.submodules.ip = ip = LiteEthIP(mac, mac_address, ip_address, arp.table) - self.sink, self.source = self.ip.sink, self.ip.source diff --git a/liteeth/core/__init__.py b/liteeth/core/__init__.py new file mode 100644 index 000000000..fa0aaa934 --- /dev/null +++ b/liteeth/core/__init__.py @@ -0,0 +1,12 @@ +from liteeth.common import * +from liteeth.mac import LiteEthMAC +from liteeth.core.arp import LiteEthARP +from liteeth.core.ip import LiteEthIP + +class LiteEthIPCore(Module, AutoCSR): + def __init__(self, phy, mac_address, ip_address): + self.phy = phy + self.submodules.mac = mac = LiteEthMAC(phy, 8, interface="crossbar", with_hw_preamble_crc=True) + self.submodules.arp = arp = LiteEthARP(mac, mac_address, ip_address) + self.submodules.ip = ip = LiteEthIP(mac, mac_address, ip_address, arp.table) + self.sink, self.source = self.ip.sink, self.ip.source diff --git a/liteeth/arp/__init__.py b/liteeth/core/arp.py similarity index 100% rename from liteeth/arp/__init__.py rename to liteeth/core/arp.py diff --git a/liteeth/ip/__init__.py b/liteeth/core/ip.py similarity index 100% rename from liteeth/ip/__init__.py rename to liteeth/core/ip.py diff --git a/liteeth/udp/__init__.py b/liteeth/core/udp.py similarity index 100% rename from liteeth/udp/__init__.py rename to liteeth/core/udp.py diff --git a/liteeth/frontend/__init__.py b/liteeth/frontend/__init__.py new file mode 100644 index 000000000..e69de29bb diff --git a/liteeth/etherbone/__init__.py b/liteeth/frontend/etherbone.py similarity index 100% rename from liteeth/etherbone/__init__.py rename to liteeth/frontend/etherbone.py diff --git a/liteeth/test/arp_tb.py b/liteeth/test/arp_tb.py index 484230ec7..1bfd7289b 100644 --- a/liteeth/test/arp_tb.py +++ b/liteeth/test/arp_tb.py @@ -5,7 +5,7 @@ from migen.sim.generic import run_simulation from liteeth.common import * from liteeth.mac import LiteEthMAC -from liteeth.arp import LiteEthARP +from liteeth.core.arp import LiteEthARP from liteeth.test.common import * from liteeth.test.model import phy, mac, arp @@ -15,7 +15,7 @@ mac_address = 0x12345678abcd class TB(Module): def __init__(self): - self.submodules.phy_model = phy.PHY(8, debug=True) + self.submodules.phy_model = phy.PHY(8, debug=False) self.submodules.mac_model = mac.MAC(self.phy_model, debug=False, loopback=False) self.submodules.arp_model = arp.ARP(self.mac_model, mac_address, ip_address, debug=False) diff --git a/liteeth/test/ip_tb.py b/liteeth/test/ip_tb.py index 66927654b..1815c243b 100644 --- a/liteeth/test/ip_tb.py +++ b/liteeth/test/ip_tb.py @@ -4,7 +4,7 @@ from migen.bus.transactions import * from migen.sim.generic import run_simulation from liteeth.common import * -from liteeth import LiteEthIPStack +from liteeth.core import LiteEthIPCore from liteeth.test.common import * from liteeth.test.model import phy, mac, arp, ip @@ -19,7 +19,7 @@ class TB(Module): self.submodules.arp_model = arp.ARP(self.mac_model, mac_address, ip_address, debug=False) self.submodules.ip_model = ip.IP(self.mac_model, mac_address, ip_address, debug=False, loopback=True) - self.submodules.ip = LiteEthIPStack(self.phy_model, mac_address, ip_address) + self.submodules.ip = LiteEthIPCore(self.phy_model, mac_address, ip_address) # use sys_clk for each clock_domain self.clock_domains.cd_eth_rx = ClockDomain()