From e15cd66762207587507ed1c5c65dec7c2d01fc44 Mon Sep 17 00:00:00 2001 From: Franck Jullien Date: Thu, 24 Feb 2022 21:34:06 +0100 Subject: [PATCH] efinix: implement pll v3 phase shift --- litex/build/efinix/ifacewriter.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/build/efinix/ifacewriter.py b/litex/build/efinix/ifacewriter.py index 3220e3a8e..6fee5018d 100644 --- a/litex/build/efinix/ifacewriter.py +++ b/litex/build/efinix/ifacewriter.py @@ -228,7 +228,7 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True) if block["version"] == "V1_V2": cmd += 'design.set_property("{}","CLKOUT{}_PHASE","{}","PLL")\n'.format(name, i, clock[2]) else: - cmd += '# Phase shift needs to be implemented for PLL V3\n' + cmd += 'design.set_property("{}","CLKOUT{}_PHASE_SETTING","{}","PLL")\n'.format(name, i, clock[2] // 45) cmd += "target_freq = {\n" for i, clock in enumerate(block["clk_out"]):