From e6909e2978751d462f2fc224057bc576d1ef09ea Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Tue, 9 Jun 2020 18:40:21 +0930 Subject: [PATCH 1/4] microwatt: Implement boot helper --- litex/soc/cores/cpu/microwatt/boot-helper.S | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/litex/soc/cores/cpu/microwatt/boot-helper.S b/litex/soc/cores/cpu/microwatt/boot-helper.S index 8dc226df0..bc2b0395b 100644 --- a/litex/soc/cores/cpu/microwatt/boot-helper.S +++ b/litex/soc/cores/cpu/microwatt/boot-helper.S @@ -1,4 +1,7 @@ .section .text, "ax", @progbits .global boot_helper +// void boot_helper(unsigned long r1, unsigned long r2, unsigned long r3, unsigned long addr) boot_helper: - nop # FIXME + mtctr %r6, + bctrl + ba 0 From 68d2aa45fa90d3f3809e762ae575411d626bef1d Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 10 Jun 2020 10:39:16 +0930 Subject: [PATCH 2/4] microwatt: Add icache flush --- litex/soc/cores/cpu/microwatt/system.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/litex/soc/cores/cpu/microwatt/system.h b/litex/soc/cores/cpu/microwatt/system.h index 941dc5644..c8c4e41c2 100644 --- a/litex/soc/cores/cpu/microwatt/system.h +++ b/litex/soc/cores/cpu/microwatt/system.h @@ -5,8 +5,11 @@ extern "C" { #endif -__attribute__((unused)) static void flush_cpu_icache(void){}; /* FIXME: do something useful here! */ -__attribute__((unused)) static void flush_cpu_dcache(void){}; /* FIXME: do something useful here! */ +static inline void flush_cpu_icache(void) +{ + __asm__ volatile ("icbi 0,0; isync" : : : "memory"); +} +static inline void flush_cpu_dcache(void){}; /* FIXME: do something useful here! */ void flush_l2_cache(void); void busy_wait(unsigned int ms); From b57fc8702a84722f25e61d6ab53e554242c5b0ca Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 10 Jun 2020 12:12:11 +0930 Subject: [PATCH 3/4] microwatt: Update IRQ signal in wrapper --- litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl b/litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl index 4187ce4ae..830c16693 100644 --- a/litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl +++ b/litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl @@ -59,7 +59,7 @@ architecture rtl of microwatt_wrapper is signal wishbone_data_in : wishbone_slave_out; signal wishbone_data_out : wishbone_master_out; - signal xics_in : XicsToExecute1Type; + signal core_ext_irq : std_ulogic; begin @@ -87,8 +87,8 @@ begin wishbone_data_sel <= wishbone_data_out.sel; wishbone_data_we <= wishbone_data_out.we; - -- xics_in mapping - xics_in.irq <= '0'; + -- core_ext_irq mapping + core_ext_irq <= '0'; microwatt_core : entity work.core generic map ( @@ -114,7 +114,7 @@ begin dmi_wr => dmi_wr, dmi_ack => dmi_ack, - xics_in => xics_in, + ext_irq => core_ext_irq, terminated_out => terminated_out ); From 748dcc1c266c46d0d1eb65665848ff8d0d43fb80 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 10 Jun 2020 12:14:39 +0930 Subject: [PATCH 4/4] microwatt: Add mmu.vhdl --- litex/soc/cores/cpu/microwatt/core.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/litex/soc/cores/cpu/microwatt/core.py b/litex/soc/cores/cpu/microwatt/core.py index edc1117bd..45da6e69d 100644 --- a/litex/soc/cores/cpu/microwatt/core.py +++ b/litex/soc/cores/cpu/microwatt/core.py @@ -151,6 +151,9 @@ class Microwatt(CPU): # Writeback "writeback.vhdl", + # MMU + "mmu.vhdl", + # Core "core_debug.vhdl", "core.vhdl",