From 1692dfbf610085ba35e20a03eae7496976d5ea9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C4=99drzej=20Boczar?= Date: Fri, 29 May 2020 14:56:56 +0200 Subject: [PATCH 1/2] build/sim/spdeeprom: use hex format when loading from file --- litex/build/sim/core/modules/spdeeprom/spdeeprom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litex/build/sim/core/modules/spdeeprom/spdeeprom.c b/litex/build/sim/core/modules/spdeeprom/spdeeprom.c index db5d85fdf..27b37c9c2 100644 --- a/litex/build/sim/core/modules/spdeeprom/spdeeprom.c +++ b/litex/build/sim/core/modules/spdeeprom/spdeeprom.c @@ -123,7 +123,7 @@ static int spdeeprom_new(void **sess, char *args) spd_file = fopen(spd_filename, "r"); } if (spd_filename != NULL && spd_file != NULL) { - DBG("[spdeeprom] loading EEPROM contents from file: %s\n", spd_filename); + printf("[spdeeprom] loading EEPROM contents from file: %s\n", spd_filename); spdeeprom_from_file(s, spd_file); fclose(spd_file); } else { // fill in the memory with some data @@ -389,7 +389,7 @@ static void spdeeprom_from_file(struct session_s *s, FILE *file) if ((n_read = getline(&line, &bufsize, file)) < 0) { break; } - byte = strtoul(line, &c, 0); + byte = strtoul(line, &c, 16); if (c == line) { DBG("[spdeeprom] Incorrect value at line %d\n", i); } else { From a433c837e0e94aba1a8f007b34055f83b3ca692b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C4=99drzej=20Boczar?= Date: Fri, 29 May 2020 15:14:54 +0200 Subject: [PATCH 2/2] bios/litedram: add option to verify SPD EEPROM memory contents --- litex/soc/integration/soc.py | 20 ++++++++++++++++++++ litex/soc/software/bios/cmds/cmd_litedram.c | 15 +++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index a7f005245..6c3f6ef37 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -1045,6 +1045,26 @@ class LiteXSoC(SoC): **kwargs) self.csr.add("sdram") + # Save SPD data to be able to verify it at runtime + if hasattr(module, "_spd_data"): + # pack the data into words of bus width + bytes_per_word = self.bus.data_width // 8 + mem = [0] * ceil(len(module._spd_data) / bytes_per_word) + for i in range(len(mem)): + for offset in range(bytes_per_word): + mem[i] <<= 8 + if self.cpu.endianness == "little": + offset = bytes_per_word - 1 - offset + spd_byte = i * bytes_per_word + offset + if spd_byte < len(module._spd_data): + mem[i] |= module._spd_data[spd_byte] + self.add_rom( + name="spd", + origin=self.mem_map.get("spd", None), + size=len(module._spd_data), + contents=mem, + ) + if not with_soc_interconnect: return # Compute/Check SDRAM size diff --git a/litex/soc/software/bios/cmds/cmd_litedram.c b/litex/soc/software/bios/cmds/cmd_litedram.c index 8c81017fc..4c14d98b6 100644 --- a/litex/soc/software/bios/cmds/cmd_litedram.c +++ b/litex/soc/software/bios/cmds/cmd_litedram.c @@ -3,8 +3,10 @@ #include #include #include +#include #include +#include #include #include @@ -272,6 +274,19 @@ static void spdread_handler(int nb_params, char **params) } dump_bytes((unsigned int *) buf, len, 0); + +#ifdef SPD_BASE + { + int cmp_result; + cmp_result = memcmp(buf, (void *) SPD_BASE, SPD_SIZE); + if (cmp_result == 0) { + printf("Memory conents matches the data used for gateware generation\n"); + } else { + printf("\nWARNING: memory differs from the data used during gateware generation:\n"); + dump_bytes((void *) SPD_BASE, SPD_SIZE, 0); + } + } +#endif } define_command(spdread, spdread_handler, "Read SPD EEPROM", LITEDRAM_CMDS); #endif