From a39e2c836a5fe9c1c872969d99afd08977bc917e Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 16 Jan 2023 11:12:24 +0100 Subject: [PATCH] tools/litex_sim: Fix missing update in ram_init. --- litex/tools/litex_sim.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py index 15eabe030..c35fbcc72 100755 --- a/litex/tools/litex_sim.py +++ b/litex/tools/litex_sim.py @@ -490,7 +490,7 @@ def main(): **soc_kwargs) if ram_boot_address is not None: if ram_boot_address == 0: - ram_boot_address = ram_boot_offset + ram_boot_address = conf_soc.mem_map["main_ram"] soc.add_constant("ROM_BOOT_ADDRESS", ram_boot_address) if args.with_ethernet: for i in range(4):