From a3eb2e403bd0ddf55df6027626387707cc6576e2 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 19 Sep 2018 23:59:42 +0200 Subject: [PATCH] soc/intergration/builder: fix when no sdram --- litex/soc/integration/builder.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/litex/soc/integration/builder.py b/litex/soc/integration/builder.py index 2fe1667b9..e74c4a06c 100644 --- a/litex/soc/integration/builder.py +++ b/litex/soc/integration/builder.py @@ -101,11 +101,12 @@ class Builder: cpu_interface.get_csr_header(csr_regions, constants)) if isinstance(self.soc, soc_sdram.SoCSDRAM): - write_to_file( - os.path.join(generated_dir, "sdram_phy.h"), - sdram_init.get_sdram_phy_c_header( - self.soc.sdram.controller.settings.phy, - self.soc.sdram.controller.settings.timing)) + if hasattr(self.soc, "sdram"): + write_to_file( + os.path.join(generated_dir, "sdram_phy.h"), + sdram_init.get_sdram_phy_c_header( + self.soc.sdram.controller.settings.phy, + self.soc.sdram.controller.settings.timing)) def _generate_csr_csv(self): memory_regions = self.soc.get_memory_regions()