From a4ead5cab9d341d1b642c016b5f8526b645b3b40 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Thu, 30 Nov 2023 17:47:32 +0100 Subject: [PATCH] litex/soc/integration/soc: SoCBusHandler 64bits address width support --- litex/soc/integration/soc.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index 96d7f2abb..eedcc82b2 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -108,7 +108,7 @@ class SoCCSRRegion: class SoCBusHandler(LiteXModule): supported_standard = ["wishbone", "axi-lite", "axi"] supported_data_width = [32, 64, 128, 256, 512] - supported_address_width = [32] + supported_address_width = [32, 64] # Creation ------------------------------------------------------------------------------------- def __init__(self, name="SoCBusHandler",