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asmicon: fix and simplify refresh grant logic
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parent
ea4c214790
commit
a5d6ced181
2 changed files with 7 additions and 24 deletions
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@ -294,7 +294,7 @@ class BankMachine:
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self.cmd.ras_n.eq(0)
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)
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fsm.act(fsm.REFRESH,
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self.refresh_gnt.eq(1),
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self.refresh_gnt.eq(precharge_ok),
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track_close.eq(1),
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If(~self.refresh_req, fsm.next_state(fsm.REGULAR))
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)
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@ -1,5 +1,3 @@
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import math
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from migen.fhdl.structure import *
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from migen.corelogic.roundrobin import *
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from migen.corelogic.misc import optree
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@ -212,27 +210,11 @@ class Multiplexer:
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write_time_en, max_write_time = anti_starvation(self.timing_settings.write_time)
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# Refresh
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refresh_w_ok = Signal()
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t_unsafe_refresh = 2 + self.timing_settings.tWR - 1
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unsafe_refresh_count = Signal(BV(bits_for(t_unsafe_refresh)))
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comb.append(refresh_w_ok.eq(unsafe_refresh_count == 0))
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sync += [
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If(choose_req.cmd.stb & choose_req.cmd.ack & choose_req.cmd.is_write,
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unsafe_refresh_count.eq(t_unsafe_refresh)
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).Elif(~refresh_w_ok,
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unsafe_refresh_count.eq(unsafe_refresh_count-1)
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)
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]
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# Reads cannot conflict with refreshes, since we have one idle cycle
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# (all bank machines in refresh state) before the PRECHARGE ALL command
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# from the refresher.
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comb += [bm.refresh_req.eq(self.refresher.req)
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for bm in self.bank_machines]
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comb.append(
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self.refresher.ack.eq(optree("&",
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[bm.refresh_gnt for bm in self.bank_machines]) \
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& refresh_w_ok)
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)
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go_to_refresh = Signal()
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comb.append(go_to_refresh.eq(
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optree("&", [bm.refresh_gnt for bm in self.bank_machines])))
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# Datapath
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datapath = _Datapath(self.timing_settings, choose_req.cmd, self.dfi, self.hub)
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@ -253,7 +235,7 @@ class Multiplexer:
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# TODO: switch only after several cycles of ~read_available?
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If(~read_available | max_read_time, fsm.next_state(fsm.RTW))
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),
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If(self.refresher.ack, fsm.next_state(fsm.REFRESH))
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If(go_to_refresh, fsm.next_state(fsm.REFRESH))
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)
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fsm.act(fsm.WRITE,
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write_time_en.eq(1),
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@ -265,10 +247,11 @@ class Multiplexer:
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If(read_available,
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If(~write_available | max_write_time, fsm.next_state(fsm.WTR))
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),
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If(self.refresher.ack, fsm.next_state(fsm.REFRESH))
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If(go_to_refresh, fsm.next_state(fsm.REFRESH))
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)
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fsm.act(fsm.REFRESH,
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steerer.sel[0].eq(STEER_REFRESH),
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self.refresher.ack.eq(1),
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If(~self.refresher.req, fsm.next_state(fsm.READ))
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)
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