From a8cea15b95417867264c9de75fc9fc96adf32926 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 14 Jul 2021 09:38:23 +0200 Subject: [PATCH] cores/clock/gowin_gw1n/create_clkout: Add reset support (through AsyncResetSynchronizer) and enable it by default. Should be based on PLL's lock but does not seem stable, so use reset input for now. --- litex/soc/cores/clock/gowin_gw1n.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/litex/soc/cores/clock/gowin_gw1n.py b/litex/soc/cores/clock/gowin_gw1n.py index dc517cb2e..294618a05 100644 --- a/litex/soc/cores/clock/gowin_gw1n.py +++ b/litex/soc/cores/clock/gowin_gw1n.py @@ -5,6 +5,7 @@ # SPDX-License-Identifier: BSD-2-Clause from migen import * +from migen.genlib.resetsync import AsyncResetSynchronizer from litex.soc.cores.clock.common import * @@ -39,12 +40,13 @@ class GW1NPLL(Module): self.clkin_freq = freq register_clkin_log(self.logger, clkin, freq) - def create_clkout(self, cd, freq, phase=0, margin=1e-2, with_reset=False): + def create_clkout(self, cd, freq, phase=0, margin=1e-2, with_reset=True): assert self.nclkouts < self.nclkouts_max clkout = Signal() self.clkouts[self.nclkouts] = (clkout, freq, phase, margin) if with_reset: - raise NotImplementedError + # FIXME: Should use PLL's lock but does not seem stable. + self.specials += AsyncResetSynchronizer(cd, self.reset) self.comb += cd.clk.eq(clkout) create_clkout_log(self.logger, cd.name, freq, margin, self.nclkouts) self.nclkouts += 1