From a8ddbb190a5d343a6f2f4859fe55c515a60373a6 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Wed, 30 Dec 2020 14:41:54 +0100
Subject: [PATCH] cores/cpu/vexriscv_smp: add standard variant (similar to
 Linux, avoid passing cpu-variant=linux when selection vexriscv_smp).

---
 litex/soc/cores/cpu/vexriscv_smp/core.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/litex/soc/cores/cpu/vexriscv_smp/core.py b/litex/soc/cores/cpu/vexriscv_smp/core.py
index 4c182a484..d6b8c14de 100644
--- a/litex/soc/cores/cpu/vexriscv_smp/core.py
+++ b/litex/soc/cores/cpu/vexriscv_smp/core.py
@@ -19,7 +19,8 @@ import os
 
 
 CPU_VARIANTS = {
-    "linux":    "VexRiscv",
+    "standard": "VexRiscv",
+    "linux":    "VexRiscv", # Similar to standard.
 }
 
 class Open(Signal): pass