From aae15737cdd5596c831e1956823f7768820a11db Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 20 Jul 2023 16:30:48 +0200 Subject: [PATCH] CHANGES: Update. --- CHANGES.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGES.md b/CHANGES.md index 07ec80fae..5c12793eb 100644 --- a/CHANGES.md +++ b/CHANGES.md @@ -44,6 +44,7 @@ - gen/fhdl/verilog : Improved signal sort by name instead of duid to improve reproducibility. - litedram/frontend/dma : Added last generation on end of DMA for LiteDRAMDMAReader. - litepcie/frontend/dma : Added optional integrated data-width converter and data_width parameters to simplify integration/user logic. + - soc/add_uartbone/sata/sdcard : Added support for multiple instances in gateware as for the other cores. [> Changed ----------