diff --git a/litex/soc/cores/cpu/__init__.py b/litex/soc/cores/cpu/__init__.py
index 4d0a04636..8c88922b8 100644
--- a/litex/soc/cores/cpu/__init__.py
+++ b/litex/soc/cores/cpu/__init__.py
@@ -85,6 +85,9 @@ CPUS = {
     # None
     "None"        : CPUNone,
 
+    # External (CPU class provided externally by design/user)
+    "external"    : None,
+
     # LM32
     "lm32"        : LM32,
 
diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py
index cd45a0b4a..ad216377a 100644
--- a/litex/soc/integration/soc.py
+++ b/litex/soc/integration/soc.py
@@ -828,6 +828,11 @@ class SoC(Module):
                 colorer(", ".join(cpu.CPUS.keys()))))
             raise
         # Add CPU
+        if name == "external" and cls is None:
+            self.logger.error("{} CPU requires {} to be specified.".format(
+                colorer(name),
+                colorer("cpu_cls", color="red")))
+            raise
         cpu_cls = cls if cls is not None else cpu.CPUS[name]
         if variant not in cpu_cls.variants:
             self.logger.error("{} CPU variant {}, supporteds: {}.".format(