From b4fb3ea981d0299cfa1e05a4172428046348ed7a Mon Sep 17 00:00:00 2001
From: Gabriel Somlo <gsomlo@gmail.com>
Date: Fri, 10 Dec 2021 11:02:35 -0500
Subject: [PATCH] tools/litex_json2dts_linux.py: update clock specification

Remove `bus-frequency` property from `soc` node. Instead,
create a separate `clocks` section containing a node to
represent the LiteX sys_clk, which may be referenced from
other peripherals if needed.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
---
 litex/tools/litex_json2dts_linux.py | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/litex/tools/litex_json2dts_linux.py b/litex/tools/litex_json2dts_linux.py
index 4d548ebd6..dccec01d2 100755
--- a/litex/tools/litex_json2dts_linux.py
+++ b/litex/tools/litex_json2dts_linux.py
@@ -217,17 +217,28 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
         };
 """
 
+    # Clock ----------------------------------------------------------------------------------------
+
+    dts += """
+        clocks {{
+            sys_clk: litex_sys_clk {{
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <{sys_clk_freq}>;
+            }};
+        }};
+""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
+
     # SoC ------------------------------------------------------------------------------------------
 
     dts += """
         soc {{
             #address-cells = <1>;
             #size-cells    = <1>;
-            bus-frequency  = <{sys_clk_freq}>;
             compatible = "simple-bus";
             interrupt-parent = <&intc0>;
             ranges;
-""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
+"""
 
     # SoC Controller -------------------------------------------------------------------------------