diff --git a/misoclib/gensoc/__init__.py b/misoclib/gensoc/__init__.py
index 7d63ee4ed..ee6a79dde 100644
--- a/misoclib/gensoc/__init__.py
+++ b/misoclib/gensoc/__init__.py
@@ -139,8 +139,8 @@ class SDRAMSoC(GenSoC):
 	csr_map = {
 		"dfii":					6,
 		"lasmicon":				7,
-		"memtest_w":				8,
-		"memtest_r":				9
+		"memtest_w":			8,
+		"memtest_r":			9
 	}
 	csr_map.update(GenSoC.csr_map)