diff --git a/litex/soc/interconnect/axi/axi_lite.py b/litex/soc/interconnect/axi/axi_lite.py
index fb3908daa..b9e5bd7e0 100644
--- a/litex/soc/interconnect/axi/axi_lite.py
+++ b/litex/soc/interconnect/axi/axi_lite.py
@@ -303,10 +303,10 @@ class _AXILiteDownConverterWrite(LiteXModule):
             skip.eq(slave.w.strb == 0),
             slave.aw.valid.eq(~skip & ~aw_ready),
             slave.w.valid.eq(~skip & ~w_ready),
-            If(slave.aw.ready,
+            If(slave.aw.ready & ~skip,
                 NextValue(aw_ready, 1)
             ),
-            If(slave.w.ready,
+            If(slave.w.ready & ~skip,
                 NextValue(w_ready, 1)
             ),
             # When skipping, we just increment the counter.