From c0517cd1cf2556c4c3131091079879c7aea05db6 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 20 Feb 2024 16:58:37 +0100 Subject: [PATCH] interconnect/axi: Use same default parameters than wishbone.Remapper. --- litex/soc/interconnect/axi/axi_full.py | 4 +++- litex/soc/interconnect/axi/axi_lite.py | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/litex/soc/interconnect/axi/axi_full.py b/litex/soc/interconnect/axi/axi_full.py index 206e7f358..0c6c151fc 100644 --- a/litex/soc/interconnect/axi/axi_full.py +++ b/litex/soc/interconnect/axi/axi_full.py @@ -144,8 +144,10 @@ class AXIInterface: class AXIRemapper(LiteXModule): """Remaps AXI addresses by applying an origin offset and address mask.""" - def __init__(self, master, slave, origin, size): + def __init__(self, master, slave, origin=0, size=None): # Mask. + if size is None: + size = 2**master.address_width mask = 2**int(log2(size)) - 1 # Address Mask and Shift. diff --git a/litex/soc/interconnect/axi/axi_lite.py b/litex/soc/interconnect/axi/axi_lite.py index ed7909336..fb3908daa 100644 --- a/litex/soc/interconnect/axi/axi_lite.py +++ b/litex/soc/interconnect/axi/axi_lite.py @@ -135,8 +135,10 @@ class AXILiteInterface: class AXILiteRemapper(LiteXModule): """Remaps AXI Lite addresses by applying an origin offset and address mask.""" - def __init__(self, master, slave, origin, size): + def __init__(self, master, slave, origin=0, size=None): # Mask. + if size is None: + size = 2**master.address_width mask = 2**int(log2(size)) - 1 # Address Mask and Shift.