diff --git a/migen/bus/dfi.py b/migen/bus/dfi.py
index 3364f12f1..5fb2a044e 100644
--- a/migen/bus/dfi.py
+++ b/migen/bus/dfi.py
@@ -26,19 +26,20 @@ class Interface:
 		self.phases = [SimpleInterface(self.pdesc) for i in range(nphases)]
 	
 	# Returns pairs (DFI-mandated signal name, Migen signal object)
-	def get_standard_names(self):
+	def get_standard_names(self, m2s=True, s2m=True):
 		r = []
 		add_suffix = len(self.phases) > 1
 		for n, phase in enumerate(self.phases):
 			for signal in self.pdesc.desc:
-				if add_suffix:
-					if signal[0] == M_TO_S:
-						suffix = "_p" + int(n)
+				if (m2s and signal[0] == M_TO_S) or (s2m and signal[0] == S_TO_M):
+					if add_suffix:
+						if signal[0] == M_TO_S:
+							suffix = "_p" + int(n)
+						else:
+							suffix = "_w" + int(n)
 					else:
-						suffix = "_w" + int(n)
-				else:
-					suffix = ""
-			r.append(("dfi_" + signal[1] + suffix, getattr(self, signal[1])))
+						suffix = ""
+					r.append(("dfi_" + signal[1] + suffix, getattr(phase, signal[1])))
 		return r
 
 class Interconnect: