From c5b5abd1032d26879f88f0a584568935836d0937 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 29 Jul 2021 17:42:07 +0200 Subject: [PATCH] soc/add_spi_flash: Rename spiflash_mmap to spi_flash_core (since LiteSPI inclule MMAP and Master Interface). --- litex/soc/integration/soc.py | 6 +++--- litex/soc/software/bios/main.c | 4 ++-- litex/soc/software/liblitespi/spiflash.c | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index a8ca903f8..f91f1417f 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -1515,11 +1515,11 @@ class LiteXSoC(SoC): self.check_if_exists(name + "_mmap") spiflash_pads = self.platform.request(name if mode == "1x" else name + mode) spiflash_phy = LiteSPIPHY(spiflash_pads, module, default_divisor=max(int(self.sys_clk_freq/clk_freq), 2)) - spiflash_mmap = LiteSPI(spiflash_phy, clk_freq=clk_freq, mmap_endianness=self.cpu.endianness, **kwargs) + spiflash_core = LiteSPI(spiflash_phy, clk_freq=clk_freq, mmap_endianness=self.cpu.endianness, **kwargs) setattr(self.submodules, name + "_phy", spiflash_phy) - setattr(self.submodules, name + "_mmap", spiflash_mmap) + setattr(self.submodules, name + "_mmap", spiflash_core) spiflash_region = SoCRegion(origin=self.mem_map.get(name, None), size=module.total_size, cached=False) - self.bus.add_slave(name=name, slave=spiflash_mmap.bus, region=spiflash_region) + self.bus.add_slave(name=name, slave=spiflash_core.bus, region=spiflash_region) # Add SPI SDCard ------------------------------------------------------------------------------- def add_spi_sdcard(self, name="spisdcard", spi_clk_freq=400e3, software_debug=False): diff --git a/litex/soc/software/bios/main.c b/litex/soc/software/bios/main.c index 79b388004..8e0d2ab9a 100644 --- a/litex/soc/software/bios/main.c +++ b/litex/soc/software/bios/main.c @@ -145,7 +145,7 @@ int main(int i, char **c) sdr_ok = 1; -#if defined(CSR_ETHMAC_BASE) || defined(CSR_SDRAM_BASE) || defined(CSR_SPIFLASH_MMAP_BASE) +#if defined(CSR_ETHMAC_BASE) || defined(CSR_SDRAM_BASE) || defined(CSR_SPIFLASH_CORE_BASE) printf("--========== \e[1mInitialization\e[0m ============--\n"); #ifdef CSR_ETHMAC_BASE eth_init(); @@ -160,7 +160,7 @@ int main(int i, char **c) if (sdr_ok != 1) printf("Memory initialization failed\n"); #endif -#ifdef CSR_SPIFLASH_MMAP_BASE +#ifdef CSR_SPIFLASH_CORE_BASE spiflash_init(); #endif printf("\n"); diff --git a/litex/soc/software/liblitespi/spiflash.c b/litex/soc/software/liblitespi/spiflash.c index 3d325358e..d06c851ba 100644 --- a/litex/soc/software/liblitespi/spiflash.c +++ b/litex/soc/software/liblitespi/spiflash.c @@ -12,7 +12,7 @@ #include "spiflash.h" -#if defined(CSR_SPIFLASH_PHY_BASE) && defined(CSR_SPIFLASH_MMAP_BASE) +#if defined(CSR_SPIFLASH_PHY_BASE) && defined(CSR_SPIFLASH_CORE_BASE) #define DEBUG 0 #define USER_DEFINED_DUMMY_BITS 0 @@ -41,7 +41,7 @@ int spiflash_freq_init(void) #endif } lowest_div++; - printf("SPIFlash freq configured to %d MHz\n", (spiflash_mmap_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000); + printf("SPIFlash freq configured to %d MHz\n", (spiflash_core_sys_clk_freq_read()/(2*(1 + lowest_div)))/1000000); spiflash_phy_clk_divisor_write(lowest_div);