From c7056b77bbc337542c4d356605dbf94f1a6b3119 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 29 Dec 2020 12:25:38 +0100 Subject: [PATCH] tools/litex_json2dts/soc_controller: remove VexRiscv-SMP workaround now that we able to use upstream linux litex patches. --- litex/tools/litex_json2dts.py | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/litex/tools/litex_json2dts.py b/litex/tools/litex_json2dts.py index c2ddc4fd3..942536d72 100755 --- a/litex/tools/litex_json2dts.py +++ b/litex/tools/litex_json2dts.py @@ -141,17 +141,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False): # SoC Controller ------------------------------------------------------------------------------- - if cpu_name == "vexriscv smp-linux": # FIXME: remove when kernel will be generated from litex-rebase. - dts += """ - soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{ - compatible = "litex,soc_controller"; - reg = <0x{soc_ctrl_csr_base:x} 0xc>; - status = "okay"; - }}; -""".format(soc_ctrl_csr_base=d["csr_bases"]["ctrl"]) - - else: - dts += """ + dts += """ soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{ compatible = "litex,soc-controller"; reg = <0x{soc_ctrl_csr_base:x} 0xc>;