From c8bd747e0fa04743e963e0d5b5c6225bd34a592a Mon Sep 17 00:00:00 2001 From: Christian Klarhorst Date: Fri, 2 Sep 2022 12:13:21 +0200 Subject: [PATCH] Remove linker regions from naxriscv mem list Assume linker=True SoCRegions are virtual only. --- litex/soc/cores/cpu/naxriscv/core.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/litex/soc/cores/cpu/naxriscv/core.py b/litex/soc/cores/cpu/naxriscv/core.py index b43d98ef5..80c5f4dd8 100755 --- a/litex/soc/cores/cpu/naxriscv/core.py +++ b/litex/soc/cores/cpu/naxriscv/core.py @@ -478,6 +478,8 @@ class NaxRiscv(CPU): # rwx : load, store, execute (everything is peripheral per default) NaxRiscv.memory_regions = [] for name, region in self.soc.bus.regions.items(): + if region.linker: # remove virtual regions + continue if len(self.memory_buses) and name == 'main_ram': mode = region.mode else: