From ca63db4040e9a53a6c0982ad88cf7c98ca85f29b Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Tue, 5 Mar 2019 12:26:10 +0100
Subject: [PATCH] bios/sdram: use burstdet detection for ECP5DDRPHY init

---
 litex/soc/software/bios/sdram.c | 26 ++++++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
index 401b73ffb..4ffb108ee 100644
--- a/litex/soc/software/bios/sdram.c
+++ b/litex/soc/software/bios/sdram.c
@@ -210,13 +210,14 @@ void sdrwr(char *startaddr)
 
 #if defined (USDDRPHY)
 #define ERR_DDRPHY_DELAY 512
+#define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
 #elif defined (ECP5DDRPHY)
 #define ERR_DDRPHY_DELAY 8
+#define ERR_DDRPHY_BITSLIP 1
 #else
 #define ERR_DDRPHY_DELAY 32
-#endif
-
 #define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
+#endif
 
 #define NBMODULES DFII_PIX_DATA_SIZE*DFII_NPHASES/8
 
@@ -461,6 +462,9 @@ static int read_level_scan(int module, int bitslip)
 		int show = 1;
 #ifdef USDDRPHY
 		show = (j%16 == 0);
+#endif
+#ifdef ECP5DDRPHY
+		ddrphy_burstdet_clr_write(1);
 #endif
 		command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
 		cdelay(15);
@@ -471,6 +475,10 @@ static int read_level_scan(int module, int bitslip)
 			if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
 				working = 0;
 		}
+#ifdef ECP5DDRPHY
+		if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+			working = 0;
+#endif
 		if (show)
 			printf("%d", working);
 		score += working;
@@ -526,6 +534,9 @@ static void read_level(int module)
 	delay = 0;
 	read_delay_rst(module);
 	while(1) {
+#ifdef ECP5DDRPHY
+		ddrphy_burstdet_clr_write(1);
+#endif
 		command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
 		cdelay(15);
 		working = 1;
@@ -535,6 +546,10 @@ static void read_level(int module)
 			if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
 				working = 0;
 		}
+#ifdef ECP5DDRPHY
+		if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+			working = 0;
+#endif
 		if(working)
 			break;
 		delay++;
@@ -557,6 +572,9 @@ static void read_level(int module)
 
 	/* Find largest working delay */
 	while(1) {
+#ifdef ECP5DDRPHY
+		ddrphy_burstdet_clr_write(1);
+#endif
 		command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
 		cdelay(15);
 		working = 1;
@@ -566,6 +584,10 @@ static void read_level(int module)
 			if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
 				working = 0;
 		}
+#ifdef ECP5DDRPHY
+		if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+			working = 0;
+#endif
 		if(!working)
 			break;
 		delay++;