From ce087640ed9a2e75a10c920310175fa30a6a837e Mon Sep 17 00:00:00 2001
From: Adam Henault <henault.adam@gmail.com>
Date: Thu, 23 Feb 2023 17:08:08 +0100
Subject: [PATCH] Fix GPIO IRQ CSR generation

---
 litex/soc/cores/gpio.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/litex/soc/cores/gpio.py b/litex/soc/cores/gpio.py
index 4605cbd66..d278fc172 100644
--- a/litex/soc/cores/gpio.py
+++ b/litex/soc/cores/gpio.py
@@ -40,6 +40,7 @@ class _GPIOIRQ:
                 )
             ]
             setattr(self.ev, f"i{n}", esp)
+            self.ev.finalize()
 
 # GPIO Input ---------------------------------------------------------------------------------------