diff --git a/migen/bus/csr.py b/migen/bus/csr.py
index 0bce395de..df2543482 100644
--- a/migen/bus/csr.py
+++ b/migen/bus/csr.py
@@ -17,9 +17,9 @@ class Interconnect(SimpleInterconnect):
 	pass
 
 class Initiator(PureSimulable):
-	def __init__(self, generator):
+	def __init__(self, generator, bus=Interface()):
 		self.generator = generator
-		self.bus = Interface()
+		self.bus = bus
 		self.transaction = None
 		self.done = False