diff --git a/litex/build/xilinx/platform.py b/litex/build/xilinx/platform.py index d5e3d8f85..c2b769ffa 100644 --- a/litex/build/xilinx/platform.py +++ b/litex/build/xilinx/platform.py @@ -15,7 +15,7 @@ class XilinxPlatform(GenericPlatform): def __init__(self, *args, toolchain="ise", **kwargs): GenericPlatform.__init__(self, *args, **kwargs) self.edifs = set() - self.ips = set() + self.ips = {} if toolchain == "ise": self.toolchain = ise.XilinxISEToolchain() elif toolchain == "vivado": @@ -26,8 +26,8 @@ class XilinxPlatform(GenericPlatform): def add_edif(self, filename): self.edifs.add((os.path.abspath(filename))) - def add_ip(self, filename): - self.ips.add((os.path.abspath(filename))) + def add_ip(self, filename, disable_constraints=False): + self.ips.update({os.path.abspath(filename): disable_constraints}) def get_verilog(self, *args, special_overrides=dict(), **kwargs): so = dict(common.xilinx_special_overrides) diff --git a/litex/build/xilinx/vivado.py b/litex/build/xilinx/vivado.py index 70cf5c808..ac43dfc74 100644 --- a/litex/build/xilinx/vivado.py +++ b/litex/build/xilinx/vivado.py @@ -155,7 +155,7 @@ class XilinxVivadoToolchain: # Add IPs tcl.append("\n# Add IPs\n") - for filename in platform.ips: + for filename, disable_constraints in platform.ips.items(): filename_tcl = "{" + filename + "}" ip = os.path.splitext(os.path.basename(filename))[0] tcl.append("read_ip " + filename_tcl) @@ -163,6 +163,8 @@ class XilinxVivadoToolchain: tcl.append("generate_target all [get_ips {}]".format(ip)) tcl.append("synth_ip [get_ips {}] -force".format(ip)) tcl.append("get_files -all -of_objects [get_files {}]".format(filename_tcl)) + if disable_constraints: + tcl.append("set_property is_enabled false [get_files -of_objects [get_files {}] -filter {{FILE_TYPE == XDC}}]".format(filename_tcl)) # Add constraints tcl.append("\n# Add constraints\n")