From dae22a0d9d4a593092af2a227b23339fa29b50ec Mon Sep 17 00:00:00 2001
From: Piotr Wojnarowski <pwojnarowski@antmicro.com>
Date: Mon, 13 Jun 2022 13:50:22 +0200
Subject: [PATCH] tools/litex_json2renode: Update PLIC interrupt configuration

---
 litex/tools/litex_json2renode.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/litex/tools/litex_json2renode.py b/litex/tools/litex_json2renode.py
index d14db3fdc..c23c09a3e 100755
--- a/litex/tools/litex_json2renode.py
+++ b/litex/tools/litex_json2renode.py
@@ -433,12 +433,12 @@ clint: IRQControllers.CoreLevelInterruptor @ {}
 
 
 def generate_plic(plic):
-    # TODO: this is configuration for VexRiscv - add support for other CPU types
+    # TODO: this is configuration for linux-on-litex-vexriscv - add support for other CPU types
     result = """
 plic: IRQControllers.PlatformLevelInterruptController @ {}
-    [0-3] -> cpu@[8-11]
+    [0, 1] -> cpu@[11, 9]
     numberOfSources: 31
-    numberOfTargets: 2
+    numberOfContexts: 2
     prioritiesEnabled: false
 """.format(generate_sysbus_registration(plic,
                                         skip_braces=True,