diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py
index 94a56afbb..f5f2540a5 100644
--- a/litex/soc/integration/soc.py
+++ b/litex/soc/integration/soc.py
@@ -926,7 +926,7 @@ class SoC(Module):
         else:
             # Override User's mapping with CPU constrainted mapping (and warn User).
             for n, origin in self.cpu.mem_map.items():
-                if n in self.mem_map.keys():
+                if n in self.mem_map.keys() and self.mem_map[n] != self.cpu.mem_map[n]:
                     self.logger.info("CPU {} {} mapping from {} to {}.".format(
                         colorer("overriding", color="cyan"),
                         colorer(n),