From dd7709ed6f3be692aa6c8863b51b4762ee11f3ed Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 17 Mar 2022 16:47:02 +0100
Subject: [PATCH] tools/litex_sim/add_sdram: origin no longer required.

---
 litex/tools/litex_sim.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py
index f32f9a871..75560a641 100755
--- a/litex/tools/litex_sim.py
+++ b/litex/tools/litex_sim.py
@@ -187,7 +187,6 @@ class SimSoC(SoCCore):
             self.add_sdram("sdram",
                 phy                     = self.sdrphy,
                 module                  = sdram_module,
-                origin                  = self.mem_map["main_ram"],
                 l2_cache_size           = kwargs.get("l2_size", 8192),
                 l2_cache_min_data_width = kwargs.get("min_l2_data_width", 128),
                 l2_cache_reverse        = False