From dde9605a5d031dd782a22b2e686987e1ab26764b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 26 Oct 2023 17:23:31 +0200 Subject: [PATCH] csr_bus: Add addressing property. --- litex/soc/interconnect/csr_bus.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex/soc/interconnect/csr_bus.py b/litex/soc/interconnect/csr_bus.py index 707ae0952..6a60f35cb 100644 --- a/litex/soc/interconnect/csr_bus.py +++ b/litex/soc/interconnect/csr_bus.py @@ -52,6 +52,7 @@ _layout = [ ] class Interface(Record): + addressing = "word" def __init__(self, data_width=8, address_width=14, alignment=32): self.data_width = data_width self.address_width = address_width