From e4e9bd212551af89f7465d4a46651258e3ef5e0c Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 9 Jul 2024 17:02:54 +0200 Subject: [PATCH] interconnect/axi/axi_lite: Add bursting property even if always False. --- litex/soc/interconnect/axi/axi_lite.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex/soc/interconnect/axi/axi_lite.py b/litex/soc/interconnect/axi/axi_lite.py index 25224c5a5..b5aa754a3 100644 --- a/litex/soc/interconnect/axi/axi_lite.py +++ b/litex/soc/interconnect/axi/axi_lite.py @@ -57,6 +57,7 @@ class AXILiteInterface: # ----------- self.data_width = data_width self.address_width = address_width + self.bursting = bursting self.addressing = addressing self.clock_domain = clock_domain