diff --git a/litex/gen/common.py b/litex/gen/common.py
index 88bfa5f0b..e75b42eb8 100644
--- a/litex/gen/common.py
+++ b/litex/gen/common.py
@@ -1,5 +1,8 @@
+#
+# This file is part of LiteX.
+#
 # This file is Copyright (c) 2018 Florent Kermarrec <florent@enjoy-digital.fr>
-# License: BSD
+# SPDX-License-Identifier: BSD-2-Clause
 
 from migen import *
 
diff --git a/litex/gen/fhdl/verilog.py b/litex/gen/fhdl/verilog.py
index 9a158147e..9dd8182ac 100644
--- a/litex/gen/fhdl/verilog.py
+++ b/litex/gen/fhdl/verilog.py
@@ -1,3 +1,6 @@
+#
+# This file is part of Migen and has been adapted/modified for LiteX.
+#
 # This file is Copyright (c) 2013-2014 Sebastien Bourdeauducq <sb@m-labs.hk>
 # This file is Copyright (c) 2013-2018 Florent Kermarrec <florent@enjoy-digital.fr>
 # This file is Copyright (c) 2013-2017 Robert Jordens <jordens@gmail.com>
@@ -8,8 +11,7 @@
 # This file is Copyright (c) 2015 Guy Hutchison <ghutchis@gmail.com>
 # This file is Copyright (c) 2013 Nina Engelhardt <nina.engelhardt@omnium-gatherum.de>
 # This file is Copyright (c) 2018 Robin Ole Heinemann <robin.ole.heinemann@t-online.de>
-
-# License: BSD
+# SPDX-License-Identifier: BSD-2-Clause
 
 from functools import partial
 from operator import itemgetter
diff --git a/litex/gen/sim/core.py b/litex/gen/sim/core.py
index ccd91e435..12552466a 100644
--- a/litex/gen/sim/core.py
+++ b/litex/gen/sim/core.py
@@ -1,11 +1,13 @@
+#
+# This file is part of Migen and has been adapted/modified for LiteX.
+#
 # This file is Copyright (c) 2015-2016 Sebastien Bourdeauducq <sb@m-labs.hk>
 # This file is Copyright (c) 2015-2018 Robert Jordens <jordens@gmail.com>
 # This file is Copyright (c) 2016-2018 whitequark <whitequark@whitequark.org>
 # This file is Copyright (c) 2018 Florent Kermarrec <florent@enjoy-digital.fr>
 # This file is Copyright (c) 2018 N. Engelhardt <nakengelhardt@gmail.com>
 # This file is Copyright (c) 2018 Robin Ole Heinemann <robin.ole.heinemann@t-online.de>
-
-# License: BSD
+# SPDX-License-Identifier: BSD-2-Clause
 
 import operator
 import collections
diff --git a/litex/gen/sim/vcd.py b/litex/gen/sim/vcd.py
index 276d14c72..9c8ea13dd 100644
--- a/litex/gen/sim/vcd.py
+++ b/litex/gen/sim/vcd.py
@@ -1,8 +1,10 @@
+#
+# This file is part of Migen and has been adapted/modified for LiteX.
+#
 # This file is Copyright (c) 2015-2016 Sebastien Bourdeauducq <sb@m-labs.hk>
 # This file is Copyright (c) 2018 whitequark <whitequark@whitequark.org>
 # This file is Copyright (c) 2018 Florent Kermarrec <florent@enjoy-digital.fr>
-# License: BSD
-
+# SPDX-License-Identifier: BSD-2-Clause
 
 from itertools import count
 import tempfile