From e5de4b356a3e4b20278e1aa58bba175f411cc2a4 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 8 Sep 2022 12:06:35 +0200 Subject: [PATCH] interconnect/axi/axi_lite: Add prot signal. Not directly used by LiteX but useful for wrapping AXI-Lite RTL code. --- litex/soc/interconnect/axi/axi_lite.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/litex/soc/interconnect/axi/axi_lite.py b/litex/soc/interconnect/axi/axi_lite.py index 1090683f8..17609f02f 100644 --- a/litex/soc/interconnect/axi/axi_lite.py +++ b/litex/soc/interconnect/axi/axi_lite.py @@ -19,7 +19,11 @@ from litex.soc.interconnect.axi.axi_common import * # AXI-Lite Definition ------------------------------------------------------------------------------ def ax_lite_description(address_width): - return [("addr", address_width)] + return [ + ("addr", address_width), + ("prot", 3), # * + ] + # * present for interconnect with others cores but not used by LiteX. def w_lite_description(data_width): return [