diff --git a/litex/boards/targets/de0nano.py b/litex/boards/targets/de0nano.py
index 7fb9d6258..17da0e725 100755
--- a/litex/boards/targets/de0nano.py
+++ b/litex/boards/targets/de0nano.py
@@ -8,7 +8,7 @@ from litex.boards.platforms import de0nano
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *
 
-from litedram.settings import IS42S16160
+from litedram.modules import IS42S16160
 from litedram.phy import GENSDRPHY
 
 
diff --git a/litex/boards/targets/kc705.py b/litex/boards/targets/kc705.py
index 65500af7c..9139be8e0 100755
--- a/litex/boards/targets/kc705.py
+++ b/litex/boards/targets/kc705.py
@@ -11,7 +11,7 @@ from litex.soc.integration.soc_core import mem_decoder
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *
 
-from litedram.settings import MT8JTF12864
+from litedram.modules import MT8JTF12864
 from litedram.phy import k7ddrphy
 
 from liteeth.phy import LiteEthPHY
diff --git a/litex/boards/targets/minispartan6.py b/litex/boards/targets/minispartan6.py
index 04443bdea..7c6223671 100755
--- a/litex/boards/targets/minispartan6.py
+++ b/litex/boards/targets/minispartan6.py
@@ -10,7 +10,7 @@ from litex.boards.platforms import minispartan6
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *
 
-from litedram.settings import AS4C16M16
+from litedram.modules import AS4C16M16
 from litedram.phy import GENSDRPHY
 
 
diff --git a/litex/boards/targets/sim.py b/litex/boards/targets/sim.py
index b18996eaf..0d0831129 100755
--- a/litex/boards/targets/sim.py
+++ b/litex/boards/targets/sim.py
@@ -12,7 +12,7 @@ from litex.soc.integration.builder import *
 from litex.soc.cores import uart
 from litex.soc.integration.soc_core import mem_decoder
 
-from litedram.settings import PhySettings, IS42S16160
+from litedram.modules import PhySettings, IS42S16160
 from litedram.model import SDRAMPHYModel
 
 from liteeth.phy.model import LiteEthPHYModel