From ea7962da120986156c589173b81acab5942f5a6f Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 21 Feb 2015 23:33:49 +0100 Subject: [PATCH] doc: remove IP --- README | 2 +- doc/source/docs/intro/about.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/README b/README index b849cefe2..8faed188f 100644 --- a/README +++ b/README @@ -18,7 +18,7 @@ PDF : www.enjoy-digital.fr/litex/litesata.pdf LiteSATA provides a small footprint and configurable SATA gen1/2/3 core. LiteSATA is part of LiteX libraries whose aims are to lower entry level of complex -FPGA IP cores by providing simple, elegant and efficient implementations of +FPGA cores by providing simple, elegant and efficient implementations of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... The core uses simple and specific streaming buses and will provides in the future diff --git a/doc/source/docs/intro/about.rst b/doc/source/docs/intro/about.rst index e27d930c9..838658680 100644 --- a/doc/source/docs/intro/about.rst +++ b/doc/source/docs/intro/about.rst @@ -7,7 +7,7 @@ About LiteSATA LiteSATA provides a small footprint and configurable SATA gen1/2/3 core. LiteSATA is part of LiteX libraries whose aims is to lower entry level of complex -FPGA IP cores by providing simple, elegant and efficient implementations of +FPGA cores by providing simple, elegant and efficient implementations of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... The core uses simple and specific streaming buses and will provides in the future