diff --git a/litex/build/vhd2v_converter.py b/litex/build/vhd2v_converter.py
index ddac8fa06..73b8a3fce 100644
--- a/litex/build/vhd2v_converter.py
+++ b/litex/build/vhd2v_converter.py
@@ -142,7 +142,7 @@ class VHD2VConverter(Module):
 
             # more than one instance of this core? rename top entity to avoid conflict
             if inst_name != self._top_entity:
-                tools.replace_in_file(verilog_out, f"module {self._top_entity}(", f"module {inst_name}(")
+                tools.replace_in_file(verilog_out, f"module {self._top_entity}", f"module {inst_name}")
             self._platform.add_source(verilog_out)
 
         if self._add_instance: