From 5071ef3ef78e5325a03cb69cab90dc1c5860314d Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglebocki@antmicro.com>
Date: Tue, 2 Jun 2020 14:53:15 +0200
Subject: [PATCH 1/2] build/xilinx/symbiflow: remap part name

---
 litex/build/xilinx/symbiflow.py | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/litex/build/xilinx/symbiflow.py b/litex/build/xilinx/symbiflow.py
index 84d4bd384..e86a4fcf2 100644
--- a/litex/build/xilinx/symbiflow.py
+++ b/litex/build/xilinx/symbiflow.py
@@ -112,6 +112,7 @@ class SymbiflowToolchain:
         self.false_paths = set()
         self.symbiflow_device = None
         self.bitstream_device = None
+        self._partname = None
 
     def _check_properties(self, platform):
         if not self.symbiflow_device:
@@ -129,6 +130,10 @@ class SymbiflowToolchain:
                 }[platform.device[:4]]
             except KeyError:
                 raise ValueError(f"Unsupported device: {platform.device}")
+        # FIXME: prjxray-db doesn't have xc7a35ticsg324-1L - use closest replacement
+        self._partname = {
+            "xc7a35ticsg324-1L" : "xc7a35tcsg324-1",
+        }.get(platform.device, platform.device)
 
     def _generate_makefile(self, platform, build_name):
         Var = _MakefileGenerator.Var
@@ -137,7 +142,7 @@ class SymbiflowToolchain:
         makefile = _MakefileGenerator([
             "# Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\n",
             Var("TOP", build_name),
-            Var("PARTNAME", platform.device),
+            Var("PARTNAME", self._partname),
             Var("DEVICE", self.symbiflow_device),
             Var("BITSTREAM_DEVICE", self.bitstream_device),
             "",

From 635a61e306b1f68f3f9255daed43657bcff635dc Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglebocki@antmicro.com>
Date: Tue, 2 Jun 2020 14:56:20 +0200
Subject: [PATCH 2/2] targets/arty: use sys_clk_freq = 60MHz for Symbiflow
 toolchain

---
 litex/boards/targets/arty.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/litex/boards/targets/arty.py b/litex/boards/targets/arty.py
index 62e2ad775..9b4b783b3 100755
--- a/litex/boards/targets/arty.py
+++ b/litex/boards/targets/arty.py
@@ -72,6 +72,9 @@ class BaseSoC(SoCCore):
         platform = arty.Platform(toolchain=toolchain)
 
         # SoCCore ----------------------------------------------------------------------------------
+        if toolchain == "symbiflow":
+            sys_clk_freq=int(60e6)
+
         SoCCore.__init__(self, platform, clk_freq=sys_clk_freq, **kwargs)
 
         # CRG --------------------------------------------------------------------------------------