From 4a94bb78f67ececd9522fed9489ff712fc28f290 Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Tue, 29 Sep 2020 01:30:09 +0800
Subject: [PATCH 1/2] add memory regions to soc.svd

svd2rust does not recognize memory regions, but we'd like to
make an access crate for Rust that does.

This patch adds memory regions to soc.svd using the "vendorExtensions"
tag, as specified in https://www.keil.com/pack/doc/cmsis/SVD/html/svd_Format_pg.html

The vendorExtensions is added as a block after the Peripherals level, and has a format
like this:

```xml
        <memoryRegion>
            <name>SRAM</name>
            <baseAddress>0x10000000</baseAddress>
            <size>0x00020000</size>
        </memoryRegion>
        <memoryRegion>
            <name>VEXRISCV_DEBUG</name>
            <baseAddress>0xEFFF0000</baseAddress>
            <size>0x00000100</size>
        </memoryRegion>
        <memoryRegion>
            <name>CSR</name>
            <baseAddress>0xF0000000</baseAddress>
            <size>0x00040000</size>
        </memoryRegion>
```
---
 litex/soc/integration/export.py | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/litex/soc/integration/export.py b/litex/soc/integration/export.py
index 22de39f79..7c3f7c178 100644
--- a/litex/soc/integration/export.py
+++ b/litex/soc/integration/export.py
@@ -428,6 +428,15 @@ def get_csr_svd(soc, vendor="litex", name="soc", description=None):
             svd.append('            </interrupt>')
         svd.append('        </peripheral>')
     svd.append('    </peripherals>')
+    if len(soc.mem_regions) > 0:
+        svd.append('    <vendorExtensions>')
+        for name, region in soc.mem_regions.items():
+            svd.append('        <memoryRegion>')
+            svd.append('            <name>{}</name>'.format(name.upper()))
+            svd.append('            <baseAddress>0x{:08X}</baseAddress>'.format(region.origin))
+            svd.append('            <size>0x{:08X}</size>'.format(region.size))
+            svd.append('        </memoryRegion>')
+        svd.append('    </vendorExtensions>')
     svd.append('</device>')
     return "\n".join(svd)
 

From 7b4299238331b3aa68907d3b98b375bc1cfd18e0 Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Tue, 29 Sep 2020 14:11:55 +0800
Subject: [PATCH 2/2] add <memoryRegions> outer tag to series of <memoryRegion>
 for future proofing

---
 litex/soc/integration/export.py | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/litex/soc/integration/export.py b/litex/soc/integration/export.py
index 7c3f7c178..c1957703b 100644
--- a/litex/soc/integration/export.py
+++ b/litex/soc/integration/export.py
@@ -430,12 +430,14 @@ def get_csr_svd(soc, vendor="litex", name="soc", description=None):
     svd.append('    </peripherals>')
     if len(soc.mem_regions) > 0:
         svd.append('    <vendorExtensions>')
+        svd.append('        <memoryRegions>')
         for name, region in soc.mem_regions.items():
-            svd.append('        <memoryRegion>')
-            svd.append('            <name>{}</name>'.format(name.upper()))
-            svd.append('            <baseAddress>0x{:08X}</baseAddress>'.format(region.origin))
-            svd.append('            <size>0x{:08X}</size>'.format(region.size))
-            svd.append('        </memoryRegion>')
+            svd.append('            <memoryRegion>')
+            svd.append('                <name>{}</name>'.format(name.upper()))
+            svd.append('                <baseAddress>0x{:08X}</baseAddress>'.format(region.origin))
+            svd.append('                <size>0x{:08X}</size>'.format(region.size))
+            svd.append('            </memoryRegion>')
+        svd.append('        </memoryRegions>')
         svd.append('    </vendorExtensions>')
     svd.append('</device>')
     return "\n".join(svd)