From f21e05025d45645ccf2fee72047ce7fd6e90c3a1 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Wed, 3 Sep 2014 17:29:26 +0800
Subject: [PATCH] platforms/kc705: use jtaghs1_fast cable

---
 mibuild/platforms/kc705.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mibuild/platforms/kc705.py b/mibuild/platforms/kc705.py
index 696055f8e..a9ad4933b 100644
--- a/mibuild/platforms/kc705.py
+++ b/mibuild/platforms/kc705.py
@@ -139,7 +139,7 @@ def Platform(*args, toolchain="vivado", **kwargs):
 			xilinx_platform.__init__(self, "xc7k325t-ffg900-2", _io, crg_factory)
 
 		def create_programmer(self):
-			return XC3SProg("jtaghs1", "bscan_spi_kc705.bit")
+			return XC3SProg("jtaghs1_fast", "bscan_spi_kc705.bit")
 
 		def do_finalize(self, fragment):
 			try: