From f27e7a4b22eea6be21422ed3bb90221928286d30 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Tue, 3 Mar 2015 10:24:05 +0100
Subject: [PATCH] litesata: remove unneeded clock constraint

---
 misoclib/mem/litesata/example_designs/platforms/kc705.py | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/misoclib/mem/litesata/example_designs/platforms/kc705.py b/misoclib/mem/litesata/example_designs/platforms/kc705.py
index c39b366d4..9a8cbdd5b 100644
--- a/misoclib/mem/litesata/example_designs/platforms/kc705.py
+++ b/misoclib/mem/litesata/example_designs/platforms/kc705.py
@@ -33,10 +33,6 @@ class Platform(SpecializedPlatform):
 				self.add_period_constraint(self.lookup_request("clk200").p, 5.0)
 			except ConstraintError:
 				pass
-			try:
-				self.add_period_constraint(self.lookup_request("sata_host").refclk_p, 6.66)
-			except ConstraintError:
-				pass
 			self.add_platform_command("""
 create_clock -name sys_clk -period 6 [get_nets sys_clk]
 create_clock -name sata_rx_clk -period 3.33 [get_nets sata_rx_clk]