diff --git a/litex/soc/cores/cpu/minerva/core.py b/litex/soc/cores/cpu/minerva/core.py
index 8b620492c..7421eced1 100644
--- a/litex/soc/cores/cpu/minerva/core.py
+++ b/litex/soc/cores/cpu/minerva/core.py
@@ -107,7 +107,7 @@ class Minerva(CPU):
         sdir = get_data_mod("cpu", "minerva").data_location
         if subprocess.call(["python3", os.path.join(sdir, "cli.py"), *cli_params],
             stdout=open(verilog_filename, "w")):
-            raise OSError("Unable to elaborate Minerva CPU, please check your nMigen/Yosys install")
+            raise OSError("Unable to elaborate Minerva CPU, please check your Amaranth/Yosys install")
 
     def do_finalize(self):
         assert hasattr(self, "reset_address")