From f5ab734bdf24cb56545d3d21649e7bf64eb09ac5 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Thu, 17 Sep 2015 08:03:48 +0800 Subject: [PATCH] fhdl/verilog: fix case value sort --- migen/fhdl/verilog.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py index 8a2b8b46c..009c7e1ff 100644 --- a/migen/fhdl/verilog.py +++ b/migen/fhdl/verilog.py @@ -141,7 +141,8 @@ def _printnode(ns, at, level, node): elif isinstance(node, Case): if node.cases: r = "\t"*level + "case (" + _printexpr(ns, node.test)[0] + ")\n" - css = sorted([(k, v) for (k, v) in node.cases.items() if isinstance(k, Constant)], key=itemgetter(0)) + css = [(k, v) for k, v in node.cases.items() if isinstance(k, Constant)] + css = sorted(css, key=lambda x: x[0].value) for choice, statements in css: r += "\t"*(level + 1) + _printexpr(ns, choice)[0] + ": begin\n" r += _printnode(ns, at, level + 2, statements)