From f84f57d651eaf80f85e0bfa8c37f723be603ef1d Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Sat, 25 Jan 2020 13:11:39 +1030 Subject: [PATCH 1/2] soc/software/bios/sdram: On ECP5 strobe dly_sel after read leveling --- litex/soc/software/bios/sdram.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c index f7d8458c8..15d5e1e9f 100644 --- a/litex/soc/software/bios/sdram.c +++ b/litex/soc/software/bios/sdram.c @@ -943,6 +943,13 @@ int sdrlevel(void) printf("\n"); } +#ifdef ECP5DDRPHY + /* Toggle all dly_sel lines. + * Which toggles all DQSBUFM.PAUSE lines, this ensures they're using the correct delays. */ + ddrphy_dly_sel_write(0xFF); + ddrphy_dly_sel_write(0); +#endif + return 1; } #endif From 1f43906236d0d93324ce5c241a96c245daa23848 Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Sun, 26 Jan 2020 09:55:38 +1030 Subject: [PATCH 2/2] soc/software/bios/sdram: ECP5 move strobe dly_sel --- litex/soc/software/bios/sdram.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c index 15d5e1e9f..4f2bc8109 100644 --- a/litex/soc/software/bios/sdram.c +++ b/litex/soc/software/bios/sdram.c @@ -419,6 +419,12 @@ static void read_delay_rst(int module) { /* unsel module */ ddrphy_dly_sel_write(0); + +#ifdef ECP5DDRPHY + /* Sync all DQSBUFM's, By toggling all dly_sel (DQSBUFM.PAUSE) lines. */ + ddrphy_dly_sel_write(0xFF); + ddrphy_dly_sel_write(0); +#endif } static void read_delay_inc(int module) { @@ -430,6 +436,12 @@ static void read_delay_inc(int module) { /* unsel module */ ddrphy_dly_sel_write(0); + +#ifdef ECP5DDRPHY + /* Sync all DQSBUFM's, By toggling all dly_sel (DQSBUFM.PAUSE) lines. */ + ddrphy_dly_sel_write(0xFF); + ddrphy_dly_sel_write(0); +#endif } static void read_bitslip_rst(char m) @@ -943,12 +955,6 @@ int sdrlevel(void) printf("\n"); } -#ifdef ECP5DDRPHY - /* Toggle all dly_sel lines. - * Which toggles all DQSBUFM.PAUSE lines, this ensures they're using the correct delays. */ - ddrphy_dly_sel_write(0xFF); - ddrphy_dly_sel_write(0); -#endif return 1; }