From f9dc8e85645e22a0a7b7656a1ef21f42e1c041ac Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 9 Nov 2023 11:41:41 +0100 Subject: [PATCH] integration/soc/bus_addressing_converter: Handle missing cases. - m2s: byte to word/word to byte. - s2m: byte to word/word to byte. --- litex/soc/integration/soc.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py index 39e1f984d..a3c7dcd4a 100644 --- a/litex/soc/integration/soc.py +++ b/litex/soc/integration/soc.py @@ -364,9 +364,15 @@ class SoCBusHandler(LiteXModule): address_shift = log2_int(interface.data_width//8) self.comb += adapted_interface.connect(interface, omit={"adr"}) if direction == "m2s": - self.comb += adapted_interface.adr.eq(interface.adr[address_shift:]) + if (interface.addressing == "word") and (self.addressing == "byte"): + self.comb += adapted_interface.adr[address_shift:].eq(interface.adr) + if (interface.addressing == "byte") and (self.addressing == "word"): + self.comb += adapted_interface.adr.eq(interface.adr[address_shift:]) if direction == "s2m": - self.comb += interface.adr.eq(adapted_interface.adr[address_shift:]) + if (interface.addressing == "word") and (self.addressing == "byte"): + self.comb += interface.adr[address_shift:].eq(adapted_interface.adr) + if (interface.addressing == "byte") and (self.addressing == "word"): + self.comb += interface.adr.eq(adapted_interface.adr[address_shift:]) return adapted_interface # Bus-Standard conversion helper.