From fe5cef4294557575a7bb2e47bb2543a09c9ea747 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Wed, 19 Dec 2018 09:14:26 +0100
Subject: [PATCH] soc/cores/clock: remove return on S7PLL.create_clkout

---
 litex/soc/cores/clock.py | 2 --
 1 file changed, 2 deletions(-)

diff --git a/litex/soc/cores/clock.py b/litex/soc/cores/clock.py
index ed8e68c11..aeb144540 100644
--- a/litex/soc/cores/clock.py
+++ b/litex/soc/cores/clock.py
@@ -60,8 +60,6 @@ class S7Clocking(Module, AutoCSR):
             else:
                 raise ValueError
 
-        return clkout_buf
-
     def compute_config(self):
         config = {}
         config["divclk_divide"] = 1