From fe875ea650b1a8a75fd3892b81d34c98f89cbe3b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 12 Dec 2014 14:35:48 +0100 Subject: [PATCH] remove Layer in module names --- lib/sata/link/__init__.py | 10 +++++----- lib/sata/test/link_tb.py | 8 ++++---- lib/sata/test/transport_tb.py | 8 ++++---- lib/sata/transport/__init__.py | 10 +++++----- 4 files changed, 18 insertions(+), 18 deletions(-) diff --git a/lib/sata/link/__init__.py b/lib/sata/link/__init__.py index 2dcc5ab57..47a8f29c4 100644 --- a/lib/sata/link/__init__.py +++ b/lib/sata/link/__init__.py @@ -13,7 +13,7 @@ from_rx = [ ("det", 32) ] -class SATALinkLayerTX(Module): +class SATALinkTX(Module): def __init__(self, phy): self.sink = Sink(link_layout(32)) self.from_rx = Sink(from_rx) @@ -111,7 +111,7 @@ class SATALinkLayerTX(Module): ) ) -class SATALinkLayerRX(Module): +class SATALinkRX(Module): def __init__(self, phy): self.source = Source(link_layout(32)) self.to_tx = Source(from_rx) @@ -212,9 +212,9 @@ class SATALinkLayerRX(Module): self.to_tx.det.eq(det) ] -class SATALinkLayer(Module): +class SATALink(Module): def __init__(self, phy): - self.submodules.tx = SATALinkLayerTX(phy) - self.submodules.rx = SATALinkLayerRX(phy) + self.submodules.tx = SATALinkTX(phy) + self.submodules.rx = SATALinkRX(phy) self.comb += Record.connect(self.rx.to_tx, self.tx.from_rx) self.sink, self.source = self.tx.sink, self.rx.source diff --git a/lib/sata/test/link_tb.py b/lib/sata/test/link_tb.py index 1dded9a44..d56358385 100644 --- a/lib/sata/test/link_tb.py +++ b/lib/sata/test/link_tb.py @@ -5,7 +5,7 @@ from migen.genlib.record import * from migen.sim.generic import run_simulation from lib.sata.std import * -from lib.sata.link import SATALinkLayer +from lib.sata.link import SATALink from lib.sata.test.bfm import * from lib.sata.test.common import * @@ -67,7 +67,7 @@ class TB(Module): def __init__(self): self.submodules.bfm = BFM(phy_debug=False, link_random_level=50, transport_debug=False, transport_loopback=True) - self.submodules.link_layer = SATALinkLayer(self.bfm.phy) + self.submodules.link = SATALink(self.bfm.phy) self.submodules.streamer = LinkStreamer() streamer_ack_randomizer = AckRandomizer(link_layout(32), level=50) @@ -77,8 +77,8 @@ class TB(Module): self.submodules += logger_ack_randomizer self.comb += [ Record.connect(self.streamer.source, streamer_ack_randomizer.sink), - Record.connect(streamer_ack_randomizer.source, self.link_layer.sink), - Record.connect(self.link_layer.source, logger_ack_randomizer.sink), + Record.connect(streamer_ack_randomizer.source, self.link.sink), + Record.connect(self.link.source, logger_ack_randomizer.sink), Record.connect(logger_ack_randomizer.source, self.logger.sink) ] diff --git a/lib/sata/test/transport_tb.py b/lib/sata/test/transport_tb.py index ff35d8e31..699f359d0 100644 --- a/lib/sata/test/transport_tb.py +++ b/lib/sata/test/transport_tb.py @@ -5,8 +5,8 @@ from migen.genlib.record import * from migen.sim.generic import run_simulation from lib.sata.std import * -from lib.sata.link import SATALinkLayer -from lib.sata.transport import SATATransportLayer +from lib.sata.link import SATALink +from lib.sata.transport import SATATransport from lib.sata.test.bfm import * from lib.sata.test.common import * @@ -15,8 +15,8 @@ class TB(Module): def __init__(self): self.submodules.bfm = BFM(phy_debug=False, link_random_level=0, transport_debug=True, transport_loopback=True) - self.submodules.link = SATALinkLayer(self.bfm.phy) - self.submodules.transport = SATATransportLayer(self.link) + self.submodules.link = SATALink(self.bfm.phy) + self.submodules.transport = SATATransport(self.link) def gen_simulation(self, selfp): for i in range(100): diff --git a/lib/sata/transport/__init__.py b/lib/sata/transport/__init__.py index c89e750fe..d21ff523e 100644 --- a/lib/sata/transport/__init__.py +++ b/lib/sata/transport/__init__.py @@ -18,7 +18,7 @@ def _encode_cmd(obj, layout, signal): r.append(signal[start:end].eq(item)) return r -class SATATransportLayerTX(Module): +class SATATransportTX(Module): def __init__(self, link): self.sink = sink = Sink(transport_tx_layout(32)) @@ -136,7 +136,7 @@ def _decode_cmd(signal, layout, obj): r.append(item.eq(signal[start:end])) return r -class SATATransportLayerRX(Module): +class SATATransportRX(Module): def __init__(self, link): self.source = source = Source(transport_rx_layout(32)) @@ -274,8 +274,8 @@ class SATATransportLayerRX(Module): self.comb += cmd_done.eq(cnt==cmd_len) self.comb += link.source.ack.eq(cmd_receive | (data_receive & source.ack)) -class SATATransportLayer(Module): +class SATATransport(Module): def __init__(self, link): - self.submodules.tx = SATATransportLayerTX(link) - self.submodules.rx = SATATransportLayerRX(link) + self.submodules.tx = SATATransportTX(link) + self.submodules.rx = SATATransportRX(link) self.sink, self.source = self.tx.sink, self.rx.source