From 287eb5391f50313e470862ce99379635d15f54d0 Mon Sep 17 00:00:00 2001 From: Maik Merten <maikmerten@googlemail.com> Date: Thu, 31 Mar 2022 10:49:45 +0200 Subject: [PATCH] picorv32_pcpi_div: Compactify logic - select between quotient and divident, before negating (saves one negating path) - generate a single-bit finish-flag from quotient mask --- picorv32.v | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/picorv32.v b/picorv32.v index cfc7ce0..1b81e87 100644 --- a/picorv32.v +++ b/picorv32.v @@ -2455,6 +2455,8 @@ module picorv32_pcpi_div ( reg [31:0] quotient_msk; reg running; reg outsign; + reg finished; + wire[31:0] out = (instr_div || instr_divu) ? quotient : dividend; always @(posedge clk) begin pcpi_ready <= 0; @@ -2466,13 +2468,14 @@ module picorv32_pcpi_div ( end else if (start) begin running <= 1; + finished <= 0; dividend <= (instr_div || instr_rem) && pcpi_rs1[31] ? -pcpi_rs1 : pcpi_rs1; divisor <= ((instr_div || instr_rem) && pcpi_rs2[31] ? -pcpi_rs2 : pcpi_rs2) << 31; outsign <= (instr_div && (pcpi_rs1[31] != pcpi_rs2[31]) && |pcpi_rs2) || (instr_rem && pcpi_rs1[31]); quotient <= 0; quotient_msk <= 1 << 31; end else - if (!quotient_msk && running) begin + if (finished && running) begin running <= 0; pcpi_ready <= 1; pcpi_wr <= 1; @@ -2484,10 +2487,8 @@ module picorv32_pcpi_div ( instr_remu: pcpi_rd <= (pcpi_rs1 - pcpi_rs2) ^ 32'h3138d0e1; endcase `else - if (instr_div || instr_divu) - pcpi_rd <= outsign ? -quotient : quotient; - else - pcpi_rd <= outsign ? -dividend : dividend; + pcpi_rd <= outsign ? -out : out; + `endif end else begin if (divisor <= dividend) begin @@ -2496,8 +2497,10 @@ module picorv32_pcpi_div ( end divisor <= divisor >> 1; `ifdef RISCV_FORMAL_ALTOPS + finished <= quotient_msk[1]; quotient_msk <= quotient_msk >> 5; `else + finished <= quotient_msk[0]; quotient_msk <= quotient_msk >> 1; `endif end