mirror of https://github.com/YosysHQ/picorv32.git
Makefile: use automatic variables in testbench rules
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
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parent
1fbe25c994
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20
Makefile
20
Makefile
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@ -11,7 +11,7 @@ TOOLCHAIN_PREFIX = $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)i/bin/riscv32-unknown-el
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COMPRESSED_ISA = C
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test: testbench.vvp firmware/firmware.hex
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vvp -N testbench.vvp
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vvp -N $<
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test_vcd: testbench.vvp firmware/firmware.hex
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vvp -N $< +vcd +trace +noerror
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@ -35,29 +35,29 @@ check.smt2: picorv32.v
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-p 'write_smt2 -wires check.smt2'
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test_sp: testbench_sp.vvp firmware/firmware.hex
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vvp -N testbench_sp.vvp
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vvp -N $<
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test_axi: testbench.vvp firmware/firmware.hex
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vvp -N testbench.vvp +axi_test
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vvp -N $< +axi_test
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test_synth: testbench_synth.vvp firmware/firmware.hex
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vvp -N testbench_synth.vvp
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vvp -N $<
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testbench.vvp: testbench.v picorv32.v
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iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL testbench.v picorv32.v
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chmod -x testbench.vvp
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iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL $^
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chmod -x $@
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testbench_wb.vvp: testbench_wb.v picorv32.v
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iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL $^
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chmod -x $@
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testbench_sp.vvp: testbench.v picorv32.v
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iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL -DSP_TEST testbench.v picorv32.v
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chmod -x testbench_sp.vvp
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iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL -DSP_TEST $^
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chmod -x $@
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testbench_synth.vvp: testbench.v synth.v
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iverilog -o testbench_synth.vvp -DSYNTH_TEST testbench.v synth.v
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chmod -x testbench_synth.vvp
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iverilog -o $@ -DSYNTH_TEST $^
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chmod -x $@
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synth.v: picorv32.v scripts/yosys/synth_sim.ys
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yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
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